Date: 09th & 10th March 2013 | Venue: VLSI Design LAB, NIELIT, Calicut
Address for Correspondence (Program Coordinator):
VLSI Design Group, NIELIT, Calicut, NIT Campus (PO).PIN: 673601, Kerala, India.
E-mail: [email protected]
- VHDL Fundamentals
- Hands-on with EDA Tool
- Modeling Abstractions
- Design Examples & Case studies
Who should attend? : Professionals,Faculty & Students from technical Institutions.
How to Register
Step 1: The applicant must first remit the registration fee, by means of pay in slip available at this link (Collect the journal number/UTR number from the bank)
Make a DD in favor of “DIRECTOR, NIELIT, CALICUT” payable at SBI, NIT Calicut (CREC) branch.
Step 2: Registration online at IEEE-VHDL Online Registration Form quoting DD/Journal number.
Step3: Registration number (obtained after online registration) may be quoted along with the name of the applicant on the counterfoil/ flip side of the DD. Duly filled in application form along with registration fee (DD/Counterfoil of pay in slip) may be sent to the STTP coordinator (address given on top of this page), so as to reach, by, 07th March 2013.
NB: Registration will be complete only upon receipt of proof of payment of registration fee.
Selection will be on a ‘first come first served’ basis from among the eligible registrants. Only very limited seats are available
The participants are ought to make their own arrangements for accommodation.
However lodging for the participants may be arranged in hostels on chargeable basis strictly based on availability and on early request. Contact Workshop Coordinator for details
DOWNLOAD WORKSHOP BROCHURE ONLINE REGISTRATION FORM
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